This invention relates to organic field effect transistors (OFETS) and processes for their manufacture.
Field effect transistors (FET) based on inorganic materials such as Si are well established in the microelectronics industry. A typical FET consists of a number of layers and they can be configured in various ways. For example, an FET may comprise a substrate, an insulator, a semiconductor, source and drain electrodes connected to the semiconductor and a gate electrode adjacent the insulator. When a potential is applied on the gate electrode, charge carriers are accumulated in the semiconductor at its interface with the insulator. As a result, a conductive channel is formed between the source and the drain and a current will flow if a potential is applied to the drain.
In the past decade there has been growing interest in developing FETs using organic materials. Organic devices offer the advantage of structural flexibility, potentially much lower manufacturing costs and the possibility of low temperature ambient manufacturing processes on large areas. To take full advantage of organic circuits there is a need for materials and processes based on efficient coating methods to form various elements of an FET.
In order to achieve large current and fast switching, the semiconductor should have high carrier mobility. Thus significant effort has been concentrated on the development of organic semiconductor (OSC) materials with high mobilities. The progress of the development of organic semiconductor materials is well reviewed in the IBM Journal of Research & Development Vol. 45 No1. 2001. However, transistor performance is vastly affected by other components/materials used in an FET and also by the preparation conditions. Thus there is a need for improved materials, for example for use as gate insulators and for processes for preparing FETs reproducibly.
It is the purpose of the present invention to provide new and improved organic FETs and techniques to fabricate high quality organic transistors. It is also the purpose of the present invention to provide techniques to improve the semiconductor-insulator interface by the choice of materials and preparation conditions. In particular the present invention concerns the insulating material used in organic FETs.
The following prior art discloses gate insulators and processing techniques useful in organic semiconductors.
Gate insulators most widely used with organic FETs include inorganic and organic insulators with relatively high permittivities (i.e. relative permittivity, ε, also called dielectric constant). For example SiO2 (∈˜4) and Al2O3 (∈˜9–10), and organic insulators such as polyvinylphenol (∈=3.5) have been used. Good results have been reported in conjunction with semiconductors such as evaporated pentacene, oligo- and polythiophenes where reported mobilities were in the order of 0.01–0.6 cm2V−1s−1.
Much effort has been directed towards producing oriented organic semiconductor layers to improve mobilities. However, in order to achieve the orientation of the semiconductor layer, production processes have been used which are difficult and/or costly to apply to large areas, thus detracting from one of the potential advantages of OFETs, i.e. the possibility of solution coating the layers over large areas.
Wittmann and Smith (Nature 1991, 352, 414,) describe a technique of orienting organic materials on an oriented PTFE substrate. The PTFE is oriented by sliding a bar of solid PTFE on a hot substrate. This technique is applied in U.S. Pat. No. 5,912,473 (Matsushita, 1999, also U.S. Pat. No. 5,556,706 and U.S. Pat. No. 5,546,889) to use the PTFE oriented film as a substrate for depositing organic semiconductors in the manufacture of field effect transistors. The organic semiconductor also becomes oriented resulting in a higher carrier mobility. The PTFE layer is deposited according to the technique of Wittmann and Smith, i.e. sliding solid PTFE on the hot substrate. This orientation layer is not solution coated thus the technique is difficult to apply on large areas. In U.S. Pat. No. 5,546,889 (Matsushita, 1996) in particular, it describes a method of orienting organic films by the use of an alignment layer onto which the organic material is deposited. The alignment layer is provided by pressing a PTFE rod onto a hot surface and sliding it in one direction. In this way a thin oriented PTFE layer is deposited on a surface. One embodiment describes the deposition of the PTFE layer onto the insulator of an OFET prior to the deposition of the OSC. This method requires the substrate and insulator to be heated to unacceptably high temperatures (300° C.) and hence it is not preferred. In addition as the PTFE is not in solution form the method is difficult to apply on large areas. Finally, the invention does not provide any means for a top gate OFET via this technique.
JP7221367 (Matsushita, 1995) describes a technique for the orientation of thiophene oligomers by the use of an oriented polymer substrate. The polymer substrate can be a solution coated amorphous perfluoropolymer, which is rubbed to induce orientation. The document teaches the use of the perfluoropolymer as an alignment layer. For the gate insulator material the document suggests cyano ethyl pullulane, a cyano ethyl cellulose, polyvinyl alcohol, SiO2, Ta2O5.
U.S. Pat. No. 5,612,228 (Motorola, 1997) claims complementary FET circuits with p-type organic and n-type inorganic materials. The n and p materials are deposited onto the same gate insulator using a bottom gate configuration. The organic semiconductor may be polyimide, polyphenylenevinylene, phthalocyanine, liquid crystal polymer or sexithiophene. It is suggested that the insulator may be “any convenient dielectric media such as SiOx, SiNx, AlOx as well as organic dielectric media such as polyimides, polyacrylates, poly(vinyl chloride), perfluoropolymers and liquid crystal polymers”. The disclosure does not teach what polymer properties would be most important.
EP0786820 (Motorola, 1997) describes organic FETs with enhanced mobility by the use of orientation layers. For the orientation films rubbed polyimides, perfluoropolymers, and liquid crystal polymers are suggested. The invention suggests that the gate insulator may be “materials selected from inorganic dielectric media such as SiOx, SiNx and AlOx, as well as organic dielectric media such as polyimides, polyacrylates, poly(vinyl chloride), perfluoropolymers and liquid crystal polymers”. The disclosure does not teach what polymer properties would be most important.
U.S. Pat. No. 6,100,954 (LG Electronics, 2000) and U.S. Pat. No. 6,188,452 (LG Electronics, 2001) suggest the use of organic insulators for both gate insulators and protective layers in LCD devices using polycrystalline silicon FET. The disclosure does not concern organic semiconductors.
Dimitrakopulous et al in Synthetic Metals 92, p47, 1998 describes vapour deposited α,ω-dihexathienylene (DH6T) transistors using vapour deposited Parylene-C, Nissan Polyimide 5211 or poly(methyl methacrylate) as insulator.
WO0147043 (Plastic Logic, 2001) describe organic FETs in which the gate insulator is polyvinylphenol (PVP), polyvinylalcohol (PVA), or polymethylmethacrylate (PMMA). The insulator is ink-jet printed from a solution of the material in a polar solvent to avoid dissolution or swelling of the underlying semiconductor. The document also describes organic FETs in which the gate insulator comprises more than one layer. In these cases non polar polymers are deposited between the polar insulator and PEDOT/PSS conductive gate electrode to prevent the diffusion of ions through the polar gate insulator. Also, surface modification layers are used on top of the non-polar polymers to enhance the wetting of the PEDOT/PSS dispersion however, in all cases the insulator layer adjacent to the semiconductor is either PVP, PVA, or PMMA.
U.S. Pat. No. 6,204,5115B1 (Dow Chemical Company) disclose organic FETs based on copolymers of fluorene units. The document suggests a wide range of organic and inorganic insulators can be used provided they have a dielectric constant of at least 3.
Sheraw et al (Mat. Res. Soc. Symp. Proc. 2000, 58, 403) discloses evaporated pentacene FETs with benzocyclobutene (BCB), SiO2, Parylene C and polyimide gate insulators. BCB has a dielectric constant of 2.65, and it can be solution deposited, but it requires curing at high temperatures (200° C.). This makes the process incompatible with plastic substrates such as polyethylenenaphthalate or polyethyleneterephthalate and therefore is not preferred. Vapour deposition of the OSC is also not preferred as it is difficult to apply on large areas.
In order to reduce the operating voltage of FETs there has been a drive to use an insulator with a high dielectric constant. This is because the carrier density induced in the channel area is proportional to the permittivity according to: p=Vg∈∈0d−1e−1, where Vg is the gate voltage, e is the electronic charge, ∈0 is the permittivity of vacuum, ∈ is the relative permittivity (dielectric constant) of the insulator and d is the thickness of the insulator. High permittivity materials such as TiO2 (∈˜40–86), Ta2O5 (∈˜25), SrTiO3 (∈˜150) have been successfully used in inorganic FETs. These technologies are reviewed, by P. Balk in “Dielectrics for field effect technology” in Advanced Materials, Vol. 7, p703, 1995. In analogy to inorganic FETs, U.S. Pat. No. 5,981,970 (IBM, 1999) claims the use of high dielectric constant inorganic insulators for organic FETs. Examples are PbZrxTi1-x)O3 (PZT), Bi4Ti3O12, BaMgF4, barium zirconium titanate (BZT) and barium strontium titanate (BST). The insulators can be vacuum deposited or sol-gel spin-coated and subsequently annealed at 400–600° C. The invention teaches that a high permittivity material induces high charge density at low gate fields, which facilitates the filling of traps at the interface, thereby allowing the additional carriers to move easily without being hampered by the trapping process.
The use of high permittivity materials in organic transistors is further taught in the prior art (U.S. Pat. No. 6,207,472, IBM 2001; Dimitrakopoulos et al, Science 283, p822, 1999; Dimitrakopulos et al Adv. Mat. 11, p1372, 1999). For example, vapour deposited barium zirconate titanate (BZT, ∈=17.3), barium strontium titanate (BST, ∈=16) and Si3N4 (∈=6.2) were used with evaporated pentacene.
U.S. Pat. No. 5,347,144 (CNRS, 1994) claims organic insulators of high permittivity (∈>5) as being advantageous for organic FETs. For example it is claimed that cyanoethypullulane, which has a permittivity of 18.5, resulted in orders of magnitude higher mobility than SiO2 or polyvinylalcohol insulators. The disclosure reports that no field effect could be obtained with low permittivity materials such as polymethylmethacrylate (PMMA, ∈=3.5) or polystyrene (∈=2.6). The document attributes the result to the improved structural organisation of the organic semiconductor on a polar substrate.